In the construction of semiconductor integrated circuits, several types of topside layers are currently in use. This topside, "passivation", layer is used as a dielectric barrier to protect the underlying structure of the integrated circuit from both moisture and contaminants, which can cause corrosion or electric shorts.
In the early development of memory-type integrated circuits, a need became apparent for reprogrammable cells to accommodate project and program development during which specifications and performance criteria often change. This need has been largely supplied by the ultraviolet (UV) radiation erasable programmable read only memory (EPROM) integrated circuit.
Basically, the erase feature is activated and accomplished by shining ultraviolet light onto the semiconductor chip. The impinging radiation excites the electrons trapped on a floating gate region of the circuit structure and causes the electrons to move off the floating gate.
In order to perform the erase function, the topside passivation layer of the integrated circuit obviously must be transparent to UV light to a degree sufficient to allow the energy levels of the trapped electrons to be raised to a state whereby they will diffuse off the gate.
It is known in the art to use a quartz window, or other UV transparent insulator material, as the topside layer of the package upon which the integrated circuit is mounted. However, quartz windows are relatively expensive; other UV transparent materials do not have the high resistance to moisture, hydrogen, and ionic contaminants that a silicon nitride topside, "passivation" layer provides. For example, EPROM devices are commonly manufactured having a UV transparent passivation layer of silicon dioxide mounted on a ceramic package having just such a thick quartz window. The passivation layer has the relatively poor barrier properties as discussed above. Such an EPROM generally has good reliability, but is expensive due to the costs of fabricating the ceramic/quartz packaging.
Another example are one-time programmable read only memory (ROM) integrated circuits, which are commonly manufactured with a UV transparent passivation layer, such as silicon dioxide or silicon oxynitride in order that they may be "blanked" before mounting in a plastic package without a quartz window. Such devices are inexpensive but have relatively poor reliability because of the inadequate barrier properties.
On the contrary, an EPROM device with a silicon nitride passivation layer (exhibiting the superior barrier properties as discussed above) can be packaged in plastic without a quartz window, providing an inexpensive part having excellent reliability.
Moreover, it had been generally accepted that silicon nitride is opaque to UV light and, therefore, unsuitable for EPROM device applications. See e.g., MLS-883C.
Hence, it is an object of the present invention to provide an EPROM integrated circuit device having a passivation layer of silicon nitride which is transparent to UV light.
It is another object of the present invention to provide an EPROM integrated circuit having an improved passivation layer.
It is a further object of the present invention to provide an EPROM having a passivation layer with improved moisture and hydrogen resistance.
Yet a further object of the present invention is to provide an EPROM having a passivation layer which is less susceptible to ionic contamination problems.